Keysight / Agilent N4903B J-BERT high-performance serial BERT, 7 Gb/s and 12.5 Gb/s

Do you have a Keysight / Agilent N4903B J-BERT high-performance serial BERT, 7 Gb/s and 12.5 Gb/s you want to sell?

We buy used equipment! Learn about selling

Image Coming Soon

Keysight / Agilent N4903B J-BERT: High-Performance Serial Bit Error Rate Tester

The Keysight / Agilent N4903B J-BERT is a state-of-the-art serial Bit Error Rate Tester (BERT) designed for high-performance applications. This versatile testing solution is perfect for R&D and validation teams focused on characterizing and stressing chips and transceiver modules with serial I/O ports operating at data rates up to 14.2 Gb/s. The N4903B excels in delivering accurate characterization and rapid test execution thanks to its significantly low jitter and impressively fast transition times.

Key Features and Specifications

    • Data Rates: Supports data rates from 150 Mb/s to 7 Gb/s for pattern generation and error detection, with an option to extend the rate to 14.2 Gb/s.
    • Comprehensive Jitter Injection: Features calibrated, compliant integrated jitter injection, including options for RJ, RJ-LF, RJ-HF, PJ1, PJ2, SJ, BUJ, ISI, and various SSC types.
    • Arbitrary SSC Profile: Capable of characterizing SATA/SAS and USB3 receivers under real-world conditions with an extended SSC range.
    • Output Performance: Excellent signal performance and sensitivity ensure accurate measurements across a range of applications.
    • Measurement Capabilities: Measures BER, BERT Scan, TJ with RJ/DJ separation, eye diagram, eye mask, BER contour, and provides automated jitter tolerance assessments.
    • Dual Data Outputs: Includes two adjustable data outputs with independent PRBS and pattern, leveraging a 120 block pattern sequencer.
    • Built-in Clock Data Recovery: Features tunable loop bandwidth, supporting testing of forwarded clock devices for enhanced analysis.
    • PCIe 2.0 Compliance: Delivers various jitter injection types including LF-RJ, HF-RJ, dual-tone PJ, and residual SSC for comprehensive PCIe testing.
    • Half-rate Clock Support: Enables precise control over the clock with variable duty cycles and jitter injection.
    • Error Detector Characteristics: Features true differential inputs, automated sampling point alignment, bit recovery mode, and a measurement suite for detailed analysis.

Pattern Generator Key Characteristics

    • Available as a pattern generator at data rates of 7 Gb/s and 12.5 Gb/s, extendable to 14.2 Gb/s.
    • Low intrinsic jitter of 800 fs rms with transition times < 20 ps.
    • Differential outputs with adjustable levels for data, auxiliary data, clock, and trigger control.
    • Pattern sequencer allows the execution of up to 120 blocks with counted loops.
    • High-precision delay control for external jitter injection, ensuring accurate analysis capabilities.

Error Detector Key Characteristics

    • True differential inputs provide compatibility with modern port designs.
    • Built-in CDR with tunable loop bandwidth for adaptable testing scenarios.
    • Supports burst mode for testing of recirculating loops, enhancing the versatility of the tester.
    • Rapid generation of eye diagrams and mask results, simplifying analysis for engineers.

How can we help you with today?

RECENTLY VIEWED